CV
This is my resume.
Contact Information
| Name | Lois Orosa Nogueira |
| lois.orosa.nogueira@gmail.com | |
| Website | https://loisorosa.github.io |
| loisorosa |
Research Interests
Education
| 2008 - 2013 |
| Santiago de Compostela, Spain |
PhD
University of Santiago de Compostela
Computer Architecture
- Thesis: New Hardware Support for Transactional Memory and Parallel Debugging in Multicore Processors
- Advisor: Elisardo Antelo and Javier Bruguera
- Supported by the project “Hardware and software support for high performance computing” (TIN201017541)
- Interuniversity PhD Courses in Information Technology (University of Santiago de Compostela and University of A Coruña)
| 2000 - 2006 |
| Vigo, Spain |
M.Eng
University of Vigo
Telecommunications Engineering
Institutional Leadership
| 2025 - present |
| Santiago de Compostela, Spain |
Scientific Director
Galicia Supercomputing Center (CESGA)
- Scientific Director
- Designing a Scientific Strategy for scaling the institution
- Institutional representative
- Get and lead the European AI Factory 1HealthAI (82M EUR)
| 2022 - 2025 |
| Santiago de Compostela, Spain |
Managing Director
Galicia Supercomputing Center (CESGA)
- Leading CESGA’s strategic change.– Contributing to attract large European Funds for infraestructure, services and research.
- CESGA Representative in the Galicia Quantum Technology Hub (2022-2030, 154M EUR)
- Quantum Computer with more Qubits in South Europe (2023, 32 Qubits, 14M EUR)
- Second largest Supercomputer in Spain (Finisterrae III, 2022, 7M EUR)
Industry Experience
| 2018 - 2018 |
| Dublin, Ireland |
Internship
Xilinx Research
Training Convolutional Neural Networks (CNNs)
- Mentors: Michaela Blott, Yaman Umuroglu
| 2012 - 2012 |
| Dublin, Ireland |
Internship
Recore Systems
Development of a shared memory multicore simulator.
- Mentor: Gerard Rauwerda
| 2010 - 2010 |
| Dublin, Ireland |
Summer Internship
IBM R&D Labs
Development of compiler-based deterministic replay for X10 Language
- Mentors: Olga Golovanevsky, Marina Biberstein, Bilha Mendelson
| 2006 - 2008 |
| Santiago de Compostela, Spain |
R&D Engineer
Arantia 2010 (Televes Group)
Development of network multimedia applications (TV streaming, multimedia contents).
| 2006 - 2006 |
| Vigo, Spain |
Engineer
Communitel Global S.A (Vodafone)
Resolve second level maintenance issues, and automatize large-scale production tasks with perl and C.
| 2005 - 2005 |
| Vigo, Spain |
Engineer
Communitel Global S.A (Vodafone)
Development of a web-based application for monitoring and controlling the network infrastructure.
Academia
| 2025 - present |
| Santiago de Compostela, Spain |
Senior Researcher
Galicia Supercomputing Center (CESGA)
Design Reliable, secure and efficient computing systems for AI and other emerging applications
- Ramón y Cajal tenure track contract (ranked 1st with a score of 100/100)
- Leading a Consolidación Investigadora proyect (199.927 EUR.)
- Xunta the Galicia Consolidator Grant (115.000 EUR.)
- Leading the Experimental platform of the 1HealthAI AI Factory (4M EUR.)
| 2019 - 2022 |
| Zurich, Switzerland |
Senior Researcher
ETH Zürich, D-ITET, SAFARI group
Memory Systems and Hardware Security
- PI: Onur Mutlu
| 2014 - 2018 |
| Campinas, Brazil |
PostDoctoral Fellow
University of Campinas (UNICAMP), LSC
Architectural Support for Speculative Program Execution
- Supported by FAPESP grant 2014/03840-2.
- PI: Rodolfo Azevedo.
| 2017 - 2017 |
| Zürich, Switzerland |
Academic Guest
ETH Zürich, Department of Computer Science, SAFARI Group
Enabling security features in commodity DRAM chips
- Supported by FAPESP grant 2016/18929-4.
- Supervisor: Onur Mutlu
| 2014 - 2014 |
| Santiago de Compostela, Spain |
PostDoctoral Researcher
University of Santiago de Compostela
- Supervisor: Elisardo Antelo and Javier Bruguera
| 2013 - 2013 |
| Lisboa, Portugal |
PostDoctoral Researcher
Universidade Nova de Lisboa
Hardware support for detecting atomicity violations.
- Supported by European Cooperation in Science and Technology (COST) with a Short-term Scientific Mission (STSM).
- Supervisor: João Lourenço
| 2009 - 2009 |
| Urbana-Champaign, U.S.A |
Scholarship
University of Illinois at Urbana-Champaign (UIUC), U.S.A.
Tolerating concurrency bugs in multicore processors
- Department of Computer Science, IACOMA group
- Advisor: Josep Torrellas
Teaching Experience
| 2017 - 2021 |
| Zurich, Switzerland |
Teaching Assistant
ETH Zurich
- 263-2210-00L - Computer Architecture [Fall’17, Fall’19, Fall’20, Fall’21]
- 263-2211-00L - Seminar in Computer Architecture [Spring’19, Fall’19, Spring’20, Fall’20, Spring’21, Fall’21]
- 252-0028-00L - Digital Design and Computer Architecture [Spring’19, Spring’20, Spring’21]
| 2016 - 2016 |
| Campinas, Brazil |
Lecturer
Institute of Computing, University of Campinas
- MC102 - Algorithms and Computer Programming (90h), Spring’16
PhD Students
| 2014 - 2021 |
| University of Campinas, Brazil |
PhD Student
Jorge Luis Gonzalez Reaño
Thesis: Photonics opportunities in modern computing systems
- Co-advised with Rodolfo Azevedo
Publications
SpyHammer: Understanding and exploiting RowHammer under fine-grained temperature variations
Orosa, Lois ; Ruhrmair, Ulrich ; Yaglikci, A Giray ; Luo, Haocong ; Olgun, Ataberk ; Jattke, Patrick ; Patel, Minesh ; Kim, Jeremie S ; Razavi, Kaveh ; Mutlu, Onur
IEEE access
DRAM bender: An extensible and Versatile FPGA-based Infrastructure to Easily Test State-of-the-art DRAM chips
Olgun, Ataberk ; Hassan, Hasan ; Yaglikci, A Giray ; Tugrul, Yahya Can ; Orosa, Lois ; Luo, Haocong ; Patel, Minesh ; Ergin, Oguz ; Mutlu, Onur
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD’23)
Alp: Alleviating cpu-memory data movement overheads in memory-centric systems
Ghiasi, Nika Mansouri ; Vijaykumar, Nandita ; Oliveira, Geraldo F ; Orosa, Lois ; Fernandez, Ivan ; Sadrosadati, Mohammad ; Kanellopoulos, Konstantinos ; Hajinazar, Nastaran ; Luna, Juan Gomez ; Mutlu, Onur
IEEE Transactions on Emerging Topics in Computing (TETC’22)
EcoFlow: Efficient Convolutional Dataflows on Low-Power Neural Network Accelerators
Orosa, Lois ; Koppula, Skanda ; Kanellopoulos, Konstantinos ; Umuroglu, Yaman ; Kanellopoulos, Konstantinos ; Gomez-Luna, Juan ; Blott, Michaela ; Vissers, Kees ; Mutlu, Onur
IEEE Transactions on Computers (TC’23)
Understanding Rowhammer under Reduced Wordline Voltage: An experimental study using real dram devices
Yaglikci, A Giray ; Luo, Haocong ; De Oliviera, Geraldo F ; Olgun, Ataberk ; Patel, Minesh ; Park, Jisung ; Hassan, Hasan ; Kim, Jeremie S ; Orosa, Lois ; Mutlu, Onur
52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN’22)
pLUTo: Enabling Massively Parallel Computation in DRAM via Lookup Tables
Ferreira, Joao Dinis ; Falcao, Gabriel ; Gomez-Luna, Juan ; Alser, Mohammed ; Orosa, Lois ; Sadrosadati, Mohammad ; Kim, Jeremie S ; Oliveira, Geraldo F ; Shahroodi, Taha ; Nori, Anant ; Mutlu, Onur
55th IEEE/ACM International Symposium on Microarchitecture (MICRO’22)
Hira: Hidden Row Activation for Reducing Refresh Latency of Off-The DRAM Chips
Yaglikci, A Giray ; Olgun, Ataberk ; Patel, Minesh ; Luo, Haocong ; Hassan, Hasan ; Orosa, Lois ; Mutlu, Onur
55th IEEE/ACM International Symposium on Microarchitecture (MICRO’22)
NEON: Enabling Efficient Support for Nonlinear Operations in Resistive RAM-based Neural Network Accelerators
Manglik, Aditya ; Patel, Minesh ; Mao, Haiyu ; Salami, Behzad ; Park, Jisung ; Orosa, Lois ; Mutlu, Onur
arXiv preprint arXiv:2211.05730
Optically Connected Memory for Disaggregated Data Centers
Gonzalez, Jorge ; Palma, Mauricio G ; Hattink, Maarten ; Rubio-Noriega, Ruth ; Orosa, Lois ; Mutlu, Onur ; Bergman, Keren ; Azevedo, Rodolfo
Journal of Parallel and Distributed Computing (JPDC’22)
DR-STRaNGe: End-to-end System Design for DRAM-based True Random Number Generators
Bostanci, F Nisa ; Olgun, Ataberk ; Orosa, Lois ; Yaglikci, A Giray ; Kim, Jeremie S ; Hassan, Hasan ; Ergin, Oguz ; Mutlu, Onur
28th IEEE International Symposium on High-Performance Computer Architecture (HPCA’22)
IChannels: Exploiting Current Management Mechanisms to Create Covert Channels in Modern Processors
Haj-Yahya, Jawad ; Orosa, Lois ; Kim, Jeremie S ; Gomez-Luna, Juan ; Yaglikci, A Giray ; Alser, Mohammed ; Puddu, Ivan ; Mutlu, Onur
48th IEEE International Symposium on Computer Architecture (ISCA’21)
A Deeper Look into RowHammer’s sensitivities: Experimental analysis of real DRAM Chips and Implications on Future Attacks and Defenses
Orosa, Lois ; Yaglikci, Abdullah Giray ; Luo, Haocong ; Olgun, Ataberk ; Park, Jisung ; Hassan, Hasan ; Patel, Minesh ; Kim, Jeremie S ; Mutlu, Onur
54th IEEE/ACM International Symposium on Microarchitecture (MICRO’21)
Reducing Solid-state Drive Read Latency by Optimizing Read-retry
Park, Jisung ; Kim, Myungsuk ; Chun, Myoungjun ; Orosa, Lois ; Kim, Jihong ; Mutlu, Onur
26th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’21)
SynCron: Efficient Synchronization Support for Near-data-processing Architectures
Giannoula, Christina ; Vijaykumar, Nandita ; Papadopoulou, Nikela ; Karakostas, Vasileios ; Fernandez, Ivan ; Gomez-Luna, Juan ; Orosa, Lois ; Koziris, Nectarios ; Goumas, Georgios ; Mutlu, Onur
27th IEEE International Symposium on High-Performance Computer Architecture (HPCA’21)
Blockhammer: Preventing rowhammer at low cost by blacklisting rapidly-accessed dram rows
Yaglikci, A Giray ; Patel, Minesh ; Kim, Jeremie S ; Azizi, Roknoddin ; Olgun, Ataberk ; Orosa, Lois ; Hassan, Hasan ; Park, Jisung ; Kanellopoulos, Konstantinos ; Shahroodi, Taha ; Ghose, Saugata ; Mutlu, Onur
27th IEEE International Symposium on High-Performance Computer Architecture (HPCA’21)
DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks
Oliveira, Geraldo F ; Gomez-Luna, Juan ; Orosa, Lois ; Ghose, Saugata ; Vijaykumar, Nandita ; Fernandez, Ivan ; Sadrosadati, Mohammad ; Mutlu, Onur
IEEE Access
Codic: A low-cost substrate for enabling custom in-dram functionalities and optimizations
Orosa, Lois ; Wang, Yaohua ; Sadrosadati, Mohammad ; Kim, Jeremie S ; Patel, Minesh ; Puddu, Ivan ; Luo, Haocong ; Razavi, Kaveh ; Gomez-Luna, Juan ; Hassan, Hasan ; others
48th IEEE International Symposium on Computer Architecture (ISCA’21)
FIGARO: Improving System Performance via Fine-grained in-DRAM Data Relocation and Caching
Wang, Yaohua ; Orosa, Lois ; Peng, Xiangjun ; Guo, Yang ; Ghose, Saugata ; Patel, Minesh ; Kim, Jeremie S ; Gomez-Luna, Juan ; Sadrosadati, Mohammad ; Ghiasi, Nika Mansouri ; Mutlu, Onur
53th IEEE/ACM International Symposium on Microarchitecture (MICRO’20)
Revisiting rowhammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques
Kim, Jeremie S ; Patel, Minesh ; Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray ; Hassan, Hasan ; Azizi, Roknoddin ; Orosa, Lois ; Mutlu, Onur
47th Annual International Symposium on Computer Architecture (ISCA’20)
FlexWatts: A Power-and Workload-aware Hybrid Power Delivery Network for Energy-efficient Microprocessors
Haj-Yahya, Jawad ; Alser, Mohammed ; Kim, Jeremie S ; Orosa, Lois ; Rotem, Efraim ; Mendelson, Avi ; Chattopadhyay, Anupam ; Mutlu, Onur
53rd IEEE/ACM International Symposium on Microarchitecture (MICRO’20)
WoLFRaM: Enhancing Wear-leveling and Fault Tolerance in Resistive Memories using Programmable Address Decoders
Yavits, Leonid ; Orosa, Lois ; Mahar, Suyash ; Ferreira, Joao Dinis ; Erez, Mattan ; Ginosar, Ran ; Mutlu, Onur
38th IEEE International Conference on Computer Design (ICCD’20)
Evanesco: Architectural Support for Efficient Data Sanitization in Modern Flash-based Storage Systems
Kim, Myungsuk ; Park, Jisung ; Cho, Genhee ; Kim, Yoona ; Orosa, Lois ; Mutlu, Onur ; Kim, Jihong
25th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’20)
Robust Machine Learning Systems: Challenges, Current Trends, Perspectives, and the Road Ahead
Shafique, Muhammad ; Naseer, Mahum ; Theocharides, Theocharis ; Kyrkou, Christos ; Mutlu, Onur ; Orosa, Lois ; Choi, Jungwook
IEEE Design & Test (D&T)
CLR-DRAM: A Low-cost DRAM Architecture Enabling Dynamic Capacity-latency Trade-off
Luo, Haocong ; Shahroodi, Taha ; Hassan, Hasan ; Patel, Minesh ; Yaglikci, A Giray ; Orosa, Lois ; Park, Jisung ; Mutlu, Onur
47th Annual International Symposium on Computer Architecture (ISCA’20)
Optically Connected Memory for Disaggregated Data Centers
Gonzalez, Jorge ; Gazman, Alexander ; Hattink, Maarten ; Palma, Mauricio G. ; Bahadori, Meisam ; Rubio-Noriega, Ruth ; Orosa, Lois ; Glick, Madeleine ; Mutlu, Onur ; Bergman, Keren ; Azevedo, Rodolfo
32nd International Symposium on Computer Architecture and High Performance Computing
D-RaNGe: Using commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput
Kim, Jeremie S ; Patel, Minesh ; Hassan, Hasan ; Orosa, Lois ; Mutlu, Onur
5th IEEE International Symposium on High-Performance Computer Architecture (HPCA’19)
ITAP: Idle-time-aware Power Management for GPU Execution Units
Sadrosadati, Mohammad ; Ehsani, Seyed Borna ; Falahati, Hajar ; Ausavarungnirun, Rachata ; Tavakkol, Arash ; Abaee, Mojtaba ; Orosa, Lois ; Wang, Yaohua ; Sarbazi-Azad, Hamid ; Mutlu, Onur
ACM Transactions on Architecture and Code Optimization (TACO)
EDEN: Enabling Energy-efficient, High-performance Deep Neural Network Inference using Approximate DRAM
Koppula, Skanda ; Orosa, Lois ; Yaglikci, A Giray ; Azizi, Roknoddin ; Shahroodi, Taha ; Kanellopoulos, Konstantinos ; Mutlu, Onur
52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO’19)
Reducing DRAM Latency via Charge-level-aware Look-ahead partial Restoration
Wang, Yaohua ; Tavakkol, Arash ; Orosa, Lois ; Ghose, Saugata ; Ghiasi, Nika Mansouri ; Patel, Minesh ; Kim, Jeremie S ; Hassan, Hasan ; Sadrosadati, Mohammad ; Mutlu, Onur
51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO’18)
AVPP: Address-first Value-next Predictor with Value Prefetching for Improving the Efficiency of Load Value Prediction
Orosa, Lois ; Azevedo, Rodolfo ; Mutlu, Onur
ACM Transactions on Architecture and Code Optimization (TACO)
FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives
Tavakkol, Arash ; Sadrosadati, Mohammad ; Ghose, Saugata ; Kim, Jeremie ; Luo, Yixin ; Wang, Yaohua ; Ghiasi, Nika Mansouri ; Orosa, Lois ; Gomez-Luna, Juan ; Mutlu, Onur
45th International Symposium on Computer Architecture (ISCA’18),
Asymmetric Allocation in a Shared Flexible Signature Module for Multicore Processors
Orosa, Lois ; Bruguera, Javier D ; Antelo, Elisardo
The Computer Journal (CJ’16)
A Hardware Approach to Detect, Expose and Tolerate High Level Data Races
Orosa, Lois ; Lourenco, Joao
4th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP’16)
Temporal frequent value locality
Orosa, Lois ; Azevedo, Rodolfo
3rd IEEE International Conference on Electronics, Circuits and Systems (ICECS’16)
Architecting a Computer with a Full Optical RAM
Gonzalez, Jorge ; Orosa, Lois ; Azevedo, Rodolfo
3rd IEEE International Conference on Electronics, Circuits and Systems (ICECS’16)
Flexsig: Implementing Flexible Hardware Signatures
Orosa, Lois ; Antelo, Elisardo ; Bruguera, Javier D
ACM Transactions on Architecture and Code Optimization (TACO)
Pacman: Tolerating Asymmetric Data Races with Unintrusive Hardware
Qi, Shanxiang ; Otsuki, Norimasa ; Nogueira, Lois Orosa ; Muzahid, Abdullah ; Torrellas, Josep
8th International Symposium on High Performance Computer Architecture (HPCA’12)
Workshops
LogSI-HTM: Log Based Snapshot Isolation in Hardware Transactional Memory
Orosa, Lois ; Azevedo, Rodolfo
7th Workshop on the Theory of Transactional Memory (WTTM’15)
A Hardware Approach for Detecting, Exposing and Tolerating High Level Atomicity Violations
Orosa, Lois ; Lourenco, Joao
Workshop on Dependable Multicore and Transactional Memory Systems (DMTM’14)
Book Chapters
Using Approximate DRAM for Enabling Energy-Efficient, High-Performance Deep Neural Network Inference
Orosa, Lois ; Koppula, Skanda ; Kanellopoulos, Konstantinos ; Yaglikci, A Giray ; Mutlu, Onur
Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures, chapter 10
Posters
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
Orosa, Lois ; Wang, Yaohua ; Sadrosadati, Mohammad ; Kim, Jeremie ; Patel, Minesh ; Puddu, Ivan ; Luo, Haocong ; Razavi, Kaveh ; Gomez-Luna, Juan ; Hassan, Hasan ; Mansouri, Nika Ghiasi ; Ghose, Saugata ; Mutlu, Onur
9th IEEE International Symposium on Computer Architecture (ISCA’22),
Dataplant: A Low-Cost In-DRAM Value Generation Primitive for Enabling System Security Features
Orosa, Lois ; Wang, Yaohua ; Puddu, Ivan ; Sadrosadati, Mohammad ; Hassan, Hasan ; Tavakkol, Arash ; Mansouri, Nika Ghiasi ; Patel, Minesh ; Kim, Jeremie ; Gomez-Luna, Juan ; Seshadri, Vivek ; Azevedo, Rodolfo ; Mutlu, Onur
ETH Systems Group Industry Retreat
Improving GPU Power and Energy Efficiency
Sadrosadati, Mohammad ; Mirhosseini, Amirhossein ; Ehsani, Seyed Borna ; Ausavarungnirun, Rachata ; Tavakkol, Arash ; Falahati, Hajar ; Orosa, Lois ; Wang, Yaohua ; Sarbazi-Azad, Hamid ; Falsafi, Babak ; Mutlu, Onur
ETH Systems Group Industry Retreat
Processing-In-Memory Benchmark Suite and Analysis
Gomez-Luna, Juan ; Tavakkol, Arash ; Boroumand, Amirali ; Olivera, Geraldo F ; Atamaner, Mert ; Sadrosadati, Mohammad ; Mansouri, Nika Ghiasi ; Orosa, Lois ; Mutlu, Onur
ETH Systems Group Industry Retreat
A Case for an Amnesic DRAM Chip
Orosa, Lois ; Wang, Yaohua ; Sadrosadati, Mohammad ; Hassan, Hasan ; Tavakkol, Arash ; Patel, Minesh ; Seshadri, Vivek ; Azevedo, Rodolfo ; Mutlu, Onur
ETH Industry day
AVPP: Address-first Value-next Predictor with Value Prefetching
Orosa, Lois ; Azevedo, Rodolfo ; Mutlu, Onur
ETH Systems Group Industry Retreat
FlexSig: Implementing Flexible Hardware Signatures
Orosa, Lois ; Antelo, Elisardo ; Bruguera, Javier D
7th HiPEAC Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC’12),
(Invited) Research Talks
Computer Architecture Research in the Galicia Supercomputing Center: Challenges and Opportunities
Orosa, Lois
1st SAFARI Conference
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
Orosa, Lois
SAFARI Seminar, Global Online event
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses
Orosa, Lois
SAFARI P&S SoftMC 2022 Spring Semester
A Deeper Look into RowHammer's Sensitivities: Experimental Analysis of Real DRAM Chips and Implications on Future Attacks and Defenses
Orosa, Lois
54th IEEE International Symposium on Microarchitecture, Global Online event
CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations
Orosa, Lois
48th IEEE International Symposium on Computer Architecture, Global Online event
FIGARO: Improving System Performance via Fine-grained in-DRAM Data Relocation and Caching
Orosa, Lois
53rd IEEE/ACM International Symposium on Microarchitecture, Global Online event
More Capable and Efficient DRAM Main Memory Designs
Orosa, Lois
Swiss Joint Research Center Workshop, École Polytechnique Fédérale de Lausanne (EPFL)
EDEN: Enabling Energy-Efficient, High-Performance Deep Neural Network Inference Using Approximate DRAM
Orosa, Lois
Computer Architecture Course (263-2210-00L), ETH Zurich
AVPP: Address-first Value-next Predictor with Value Prefetching for Improving the Efficiency of Load Value Prediction
Orosa, Lois
14th HiPEAC Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC'19), Valencia, Spain
ITAP: Idle-Time-Aware Power Management for GPU Execution Units
Orosa, Lois
14th HiPEAC Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC'19), Valencia, Spain
Temporal Frequent Value Locality
Orosa, Lois
27th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'16), London, England
Detecting, Exposing and Tolerating High Level Data Races
Orosa, Lois
2nd Manycore Workshop on Micro architectural Challenges in Performance, Energy Efficiency and Resilience, Campinas, Brazil
A Hardware Approach for Detecting, Exposing and Tolerating High Level Atomicity Violations
Orosa, Lois
24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP'16), Heraklion, Greece
Revisiting Load Value Speculation
Orosa, Lois
Seminar series, University of Campinas, Brazil
Revisiting Load Value Speculation
Orosa, Lois
Research Meeting: Performance, Energy and Reliability Challenges in Multi- and Many-core Platforms, Porto Alegre, Brazil
A Hardware Approach for Detecting, Exposing and Tolerating High Level Atomicity Violations
Orosa, Lois
Workshop on Dependable Multicore and Transactional Memory Systems (DMTM), Vienna, Austria
FlexSig: Implementing Flexible Hardware Signatures
Orosa, Lois
7th HiPEAC Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC'12), Paris, France
A Cache Filtering Mechanism for Hardware Transactional Memory Systems Decoupled from Caches
Orosa, Lois
XX Jornadas de Paralelismo, A Coruña, Spain
Introduction to microprocessors and microcontrollers
Orosa, Lois
XCARFOS Summer course (Days of automatic control and robotics with open source tools)
Public Engagement and Institutional Impact (Incomplete)
Round table and talk: Galicia's Quantum Strategy, Projects and Infraestructures
Orosa, Lois
Italy-Spain bilateral Meeting on Quantum Technologies, Madrid (Italian Embassy and Blas Cabrera Institute)
Talk: Centro de Supercomputación de Galicia (CESGA): Unha oportunidade para o ecosistema de I+D+i de Galicia
Orosa, Lois
TTick Talks (Attlantic, UVIGO)
Talk: 1HealthAI: Factoría Europea de IA para Unha Soa Saúde
Orosa, Lois
Cátedra Camelia (CiTIUS)
Talk: Centro de Supercomputación de Galicia (CESGA)
Orosa, Lois
Visit of Óscar López, Ministry of Digital Transformation of Spain
Talk: 1HealthAI: a intelixencia artificial ao servizo da saúde, da biotecnoloxía e da transformación do coñecemento
Orosa, Lois
Acto de entrega dos Premios de Investigación en Saúde Transfronteiriza Galicia–Norte de Portugal (PISGa)
Round Table: Infraestruturas e dados abertos (CESGA e DEUCALION)
Orosa, Lois
II Encontro Luso-Galaico de PLN, Santiago de Compostela
La UVigo albergará un nuevo laboratorio de computación cuántica óptica de vanguardia (VQCC-CESGA Quantum Optical Computing Lab)
Orosa, Lois
Radio Vigo (Cadena SER)
Interview: Lois Orosa, director del Cesga, sobre la nueva fábrica de IA: Va a ser una puerta a Europa
Orosa, Lois
Economía Digital Galicia
Interview: Lois Orosa, director do CESGA: A factoría de IA é unha porta a Europa dende Santiago
Orosa, Lois
COPE Galicia
¿Por qué la factoría europea de IA convertirá a Galicia en referente mundial en innovación en salud?
Orosa, Lois
La Voz de Galicia
Galicia logra un hito histórico al poner en marcha la línea de comunicación cuántica más larga de España
Orosa, Lois
esRadio (Libertad Digital)
Europa quiere ganar soberanía con la inteligencia artificial en Galicia con una fábrica pionera
Orosa, Lois
COPE (La Linterna)
Así será la nueva sede del Cesga en A Sionlla: las obras arrancarán en octubre
Orosa, Lois
El Correo Gallego
Qmio, el supercomputador cuántico que consolida la posición estratégica del I+D+i gallego
Orosa, Lois
El Correo Gallego
El sector biotech gallego confía en el Cesga para acelerar el descubrimiento de fármacos
Orosa, Lois
La Voz de Galicia
Lois Orosa en De 0 a 100: O maior valor do Cesga é o apoio á comunidade científica
Orosa, Lois
La Voz de Asturias
Hablan las protagonistas del mural de Yoseba MP que une superabuelas y computación cuántica
Orosa, Lois
La Voz de Galicia
La Xunta aprobará el lunes la licitación de la obra de la nueva sede del Cesga en A Sionlla
Orosa, Lois
La Voz de Galicia
La Xunta asegura que la nueva sede del Centro de Supercomputación situará Galicia a la vanguardia en Europa
Orosa, Lois
Galicia Press (Europa Press)
CESGA, unha Infraestructura na Vangarda da Computación Europea
Orosa, Lois
Os luns no Ateneo, Santiago de Compostela
Talk: CESGA in the Quantum Computing Era
Orosa, Lois
Corunna Innovate Summit, Coruña
El Correo Gallego mesa redonda FUTURIBLES
Orosa, Lois ; Alonso, Manuel Ángel ; Otero, María Antonia
El Correo Gallego, Santiago de Compostela
Interview: Finisterrae III
Orosa, Lois ; Martell, Chema
A Golpe de Bit (RTVE)
Finisterrae III Premiere
Orosa, Lois
CESGA
El compostelano Lois Orosa será el nuevo director del Centro de Supercomputación de Galicia
Orosa, Lois
El Correo Gallego
Honors and Awards
Top Pick in Hardware and Embedded Security 2025
Top Picks
The paper Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques, was awarded a Top Pick in Hardware and Embedded Security 2025. The Top Picks award recognizes the best of the best in hardware security from among all hardware security papers published in the last six years, across all top security (e.g., IEEE S&P, USENIX SEC), architecture (e.g., ISCA, ASPLOS), computer-aided design (e.g., ICCAD, DAC, DATE) and hardware security (CHES) venues.
RYC2023-045785-I, Ramon y Cajal Tenure Track Contract
Ministry of Science of Spain
Ranked 1st in Information and Communication Technologies area. Title More Capable, Secure and Efficient DRAM Main Memory Designs and Computer Architectures. Score 100/100, 251.800 EUR
R3 Certificate (established researcher)
Ministry of Science of Spain
Certificate given to researchers who have developed a level of independence. Score 96/100.
Intel Hardware Security Academic Award 2022
Intel
The paper BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows was nominated as a finalist for the Intel Hardware Security Academic Award 2022 (one of 4 finalists out of 34 nominations)
18 HiPEAC paper awards
HiPEAC
I received 18 HiPEAC paper awards since 2017. The HiPEAC Paper Award aims to encourage HiPEAC members to publish their work at conferences in which Europe is not strongly represented. The award is given to a HiPEAC member who presents a full paper in one of the following list of conferences, ASPLOS, DAC, FCCM, HPCA, ISCA, MICRO, PLDI, POPL
Service
- The 40th ACM International Conference on Supercomputing (ICS 2026)
- The 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2024)
- The 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2023)
- Sixth Workshop on Attacks and Solutions in Hardware Security (ASHES 2022), co-located with ACM CCS 2022
- Fifth Workshop on Attacks and Solutions in Hardware Security (ASHES 2021), co-located with ACM CCS 2021
- Quantum Information in Spain 2023 (ICE-8)
- Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) [2025, 2026]
- Transactions on Dependable and Secure Computing (TDSC) [2025]
- The Supercomputing Journal [2023]
- Transactions on Information Forensics & Security (TIFS) [2022]
- ACM Computing Surveys (CSUR) [2020]
- Transactions on Architecture and Code Optimization (TACO) [2020]
- IEEE MICRO [2019, 2020]
- Computers and Security [2019]
- Design, Automation and Test in Europe Conference (DATE) [2019]
- IEEE Transactions on Computers [2015, 2016, 2017, 2019, 2024]
- ERAD-SP [2018]
- Journal of Universal Computer Science [2018]
- Galtia Foundation for attracting high-level research talent (GALTIA) [2026]