@article{orosa2024spyhammer,title={SpyHammer: Understanding and exploiting RowHammer under fine-grained temperature variations},author={Orosa, Lois and R{\"u}hrmair, Ulrich and Ya{\u{g}}lik{\c{c}}i, A Giray and Luo, Haocong and Olgun, Ataberk and Jattke, Patrick and Patel, Minesh and Kim, Jeremie S and Razavi, Kaveh and Mutlu, Onur},journal={IEEE access},volume={12},pages={80986--81003},year={2024},publisher={IEEE},}
2023
TCAD
DRAM bender: An extensible and versatile FPGA-based infrastructure to easily test state-of-the-art DRAM chips
Ataberk Olgun, Hasan Hassan, A Giray Yağlıkçı, Yahya Can Tuğrul, Lois Orosa, Haocong Luo, Minesh Patel, Oğuz Ergin, and Onur Mutlu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
@article{olgun2023dram,title={DRAM bender: An extensible and versatile FPGA-based infrastructure to easily test state-of-the-art DRAM chips},author={Olgun, Ataberk and Hassan, Hasan and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Tu{\u{g}}rul, Yahya Can and Orosa, Lois and Luo, Haocong and Patel, Minesh and Ergin, O{\u{g}}uz and Mutlu, Onur},journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems},volume={42},number={12},pages={5098--5112},year={2023},publisher={IEEE},}
Using Approximate DRAM for Enabling Energy-Efficient, High-Performance Deep Neural Network Inference
Lois Orosa, Skanda Koppula, Konstantinos Kanellopoulos, A Giray Yağlıkçı, and Onur Mutlu
In Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures, 2023
@incollection{orosa2023using,title={Using Approximate DRAM for Enabling Energy-Efficient, High-Performance Deep Neural Network Inference},author={Orosa, Lois and Koppula, Skanda and Kanellopoulos, Konstantinos and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Mutlu, Onur},booktitle={Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures},pages={275--314},year={2023},publisher={Springer International Publishing Cham},}
TC
EcoFlow: efficient convolutional dataflows on low-power neural network accelerators
Lois Orosa, Skanda Koppula, Yaman Umuroglu, Konstantinos Kanellopoulos, Juan Gómez-Luna, Michaela Blott, Kees Vissers, and Onur Mutlu
@article{orosa2023ecoflow,title={EcoFlow: efficient convolutional dataflows on low-power neural network accelerators},author={Orosa, Lois and Koppula, Skanda and Umuroglu, Yaman and Kanellopoulos, Konstantinos and G{\'o}mez-Luna, Juan and Blott, Michaela and Vissers, Kees and Mutlu, Onur},journal={IEEE Transactions on Computers},volume={73},number={9},pages={2275--2289},year={2023},publisher={IEEE},}
2022
TETC
Alp: Alleviating cpu-memory data movement overheads in memory-centric systems
Nika Mansouri Ghiasi, Nandita Vijaykumar, Geraldo F Oliveira, Lois Orosa, Ivan Fernandez, Mohammad Sadrosadati, Konstantinos Kanellopoulos, Nastaran Hajinazar, Juan Gómez Luna, and Onur Mutlu
IEEE Transactions on Emerging Topics in Computing, 2022
@article{ghiasi2022alp,title={Alp: Alleviating cpu-memory data movement overheads in memory-centric systems},author={Ghiasi, Nika Mansouri and Vijaykumar, Nandita and Oliveira, Geraldo F and Orosa, Lois and Fernandez, Ivan and Sadrosadati, Mohammad and Kanellopoulos, Konstantinos and Hajinazar, Nastaran and Luna, Juan G{\'o}mez and Mutlu, Onur},journal={IEEE Transactions on Emerging Topics in Computing},volume={11},number={2},pages={388--403},year={2022},publisher={IEEE},}
DSN
Understanding rowhammer under reduced wordline voltage: An experimental study using real dram devices
A Giray Yağlıkçı, Haocong Luo, Geraldo F De Oliviera, Ataberk Olgun, Minesh Patel, Jisung Park, Hasan Hassan, Jeremie S Kim, Lois Orosa, and Onur Mutlu
In 2022 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2022
@inproceedings{yauglikcci2022understanding,title={Understanding rowhammer under reduced wordline voltage: An experimental study using real dram devices},author={Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Luo, Haocong and De Oliviera, Geraldo F and Olgun, Ataberk and Patel, Minesh and Park, Jisung and Hassan, Hasan and Kim, Jeremie S and Orosa, Lois and Mutlu, Onur},booktitle={2022 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)},pages={475--487},year={2022},organization={IEEE},}
MICRO
pluto: Enabling massively parallel computation in dram via lookup tables
João Dinis Ferreira, Gabriel Falcao, Juan Gómez-Luna, Mohammed Alser, Lois Orosa, Mohammad Sadrosadati, Jeremie S Kim, Geraldo F Oliveira, Taha Shahroodi, Anant Nori, and others
In 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022
@inproceedings{ferreira2022pluto,title={pluto: Enabling massively parallel computation in dram via lookup tables},author={Ferreira, Jo{\~a}o Dinis and Falcao, Gabriel and G{\'o}mez-Luna, Juan and Alser, Mohammed and Orosa, Lois and Sadrosadati, Mohammad and Kim, Jeremie S and Oliveira, Geraldo F and Shahroodi, Taha and Nori, Anant and others},booktitle={2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)},pages={900--919},year={2022},organization={IEEE},}
Hira: Hidden Row Activation for Reducing Refresh Latency of Off-The Dram Chips
A Giray Yaglikci, Ataberk Olgun, Minesh Patel, Haocong Luo, Hasan Hassan, Lois Orosa, and Onur Mutlu
In 55th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022
@inproceedings{yaglikci2022hira,title={Hira: Hidden Row Activation for Reducing Refresh Latency of Off-The Dram Chips},author={Yaglikci, A Giray and Olgun, Ataberk and Patel, Minesh and Luo, Haocong and Hassan, Hasan and Orosa, Lois and Mutlu, Onur},booktitle={55th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},year={2022},organization={IEEE Computer Soc},}
arXiv
NEON: Enabling Efficient Support for Nonlinear Operations in Resistive RAM-based Neural Network Accelerators
Aditya Manglik, Minesh Patel, Haiyu Mao, Behzad Salami, Jisung Park, Lois Orosa, and Onur Mutlu
@article{manglik2022neon,title={NEON: Enabling Efficient Support for Nonlinear Operations in Resistive RAM-based Neural Network Accelerators},author={Manglik, Aditya and Patel, Minesh and Mao, Haiyu and Salami, Behzad and Park, Jisung and Orosa, Lois and Mutlu, Onur},journal={arXiv preprint arXiv:2211.05730},year={2022},}
JPDC
Optically connected memory for disaggregated data centers
Jorge Gonzalez, Mauricio G Palma, Maarten Hattink, Ruth Rubio-Noriega, Lois Orosa, Onur Mutlu, Keren Bergman, and Rodolfo Azevedo
Journal of Parallel and Distributed Computing, 2022
@article{gonzalez2022optically,title={Optically connected memory for disaggregated data centers},author={Gonzalez, Jorge and Palma, Mauricio G and Hattink, Maarten and Rubio-Noriega, Ruth and Orosa, Lois and Mutlu, Onur and Bergman, Keren and Azevedo, Rodolfo},journal={Journal of Parallel and Distributed Computing},volume={163},pages={300--312},year={2022},publisher={Academic Press},}
HPCA
DR-STRaNGe: End-to-end system design for DRAM-based true random number generators
F Nisa Bostancı, Ataberk Olgun, Lois Orosa, A Giray Yağlıkçı, Jeremie S Kim, Hasan Hassan, Oğuz Ergin, and Onur Mutlu
In 2022 IEEE international symposium on high-performance computer architecture (HPCA), 2022
@inproceedings{bostanci2022dr,title={DR-STRaNGe: End-to-end system design for DRAM-based true random number generators},author={Bostanc{\i}, F Nisa and Olgun, Ataberk and Orosa, Lois and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Kim, Jeremie S and Hassan, Hasan and Ergin, O{\u{g}}uz and Mutlu, Onur},booktitle={2022 IEEE international symposium on high-performance computer architecture (HPCA)},pages={1141--1155},year={2022},organization={IEEE},}
2021
ISCA
IChannels: Exploiting current management mechanisms to create covert channels in modern processors
Jawad Haj-Yahya, Lois Orosa, Jeremie S Kim, Juan Gómez Luna, A Giray Yağlıkçı, Mohammed Alser, Ivan Puddu, and Onur Mutlu
In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021
@inproceedings{haj2021ichannels,title={IChannels: Exploiting current management mechanisms to create covert channels in modern processors},author={Haj-Yahya, Jawad and Orosa, Lois and Kim, Jeremie S and Luna, Juan G{\'o}mez and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Alser, Mohammed and Puddu, Ivan and Mutlu, Onur},booktitle={2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)},pages={985--998},year={2021},organization={IEEE},}
MICRO
A deeper look into RowHammer’s sensitivities: Experimental analysis of real DRAM chips and implications on future attacks and defenses
Lois Orosa, Abdullah Giray Yaglikci, Haocong Luo, Ataberk Olgun, Jisung Park, Hasan Hassan, Minesh Patel, Jeremie S Kim, and Onur Mutlu
In MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
@inproceedings{orosa2021deeper,title={A deeper look into RowHammer's sensitivities: Experimental analysis of real DRAM chips and implications on future attacks and defenses},author={Orosa, Lois and Yaglikci, Abdullah Giray and Luo, Haocong and Olgun, Ataberk and Park, Jisung and Hassan, Hasan and Patel, Minesh and Kim, Jeremie S and Mutlu, Onur},booktitle={MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture},pages={1182--1197},year={2021},}
ASPLOS
Reducing solid-state drive read latency by optimizing read-retry
Jisung Park, Myungsuk Kim, Myoungjun Chun, Lois Orosa, Jihong Kim, and Onur Mutlu
In Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2021
@inproceedings{park2021reducing,title={Reducing solid-state drive read latency by optimizing read-retry},author={Park, Jisung and Kim, Myungsuk and Chun, Myoungjun and Orosa, Lois and Kim, Jihong and Mutlu, Onur},booktitle={Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)},pages={702--716},year={2021},}
HPCA
Syncron: Efficient synchronization support for near-data-processing architectures
Christina Giannoula, Nandita Vijaykumar, Nikela Papadopoulou, Vasileios Karakostas, Ivan Fernandez, Juan Gómez-Luna, Lois Orosa, Nectarios Koziris, Georgios Goumas, and Onur Mutlu
In 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2021
@inproceedings{giannoula2021syncron,title={Syncron: Efficient synchronization support for near-data-processing architectures},author={Giannoula, Christina and Vijaykumar, Nandita and Papadopoulou, Nikela and Karakostas, Vasileios and Fernandez, Ivan and G{\'o}mez-Luna, Juan and Orosa, Lois and Koziris, Nectarios and Goumas, Georgios and Mutlu, Onur},booktitle={2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)},pages={263--276},year={2021},organization={IEEE},}
HPCA
Blockhammer: Preventing rowhammer at low cost by blacklisting rapidly-accessed dram rows
A Giray Yağlikçi, Minesh Patel, Jeremie S Kim, Roknoddin Azizi, Ataberk Olgun, Lois Orosa, Hasan Hassan, Jisung Park, Konstantinos Kanellopoulos, Taha Shahroodi, and others
In 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2021
@inproceedings{yauglikcci2021blockhammer,title={Blockhammer: Preventing rowhammer at low cost by blacklisting rapidly-accessed dram rows},author={Ya{\u{g}}lik{\c{c}}i, A Giray and Patel, Minesh and Kim, Jeremie S and Azizi, Roknoddin and Olgun, Ataberk and Orosa, Lois and Hassan, Hasan and Park, Jisung and Kanellopoulos, Konstantinos and Shahroodi, Taha and others},booktitle={2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)},pages={345--358},year={2021},organization={IEEE},}
IEEE Access
DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks
Geraldo F Oliveira, Juan Gómez-Luna, Lois Orosa, Saugata Ghose, Nandita Vijaykumar, Ivan Fernandez, Mohammad Sadrosadati, and Onur Mutlu
@article{oliveira2021damov,title={DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks},author={Oliveira, Geraldo F and G{\'o}mez-Luna, Juan and Orosa, Lois and Ghose, Saugata and Vijaykumar, Nandita and Fernandez, Ivan and Sadrosadati, Mohammad and Mutlu, Onur},journal={IEEE Access},volume={9},pages={134457--134502},year={2021},publisher={IEEE},}
ISCA
Codic: A low-cost substrate for enabling custom in-dram functionalities and optimizations
Lois Orosa, Yaohua Wang, Mohammad Sadrosadati, Jeremie S Kim, Minesh Patel, Ivan Puddu, Haocong Luo, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, and others
In 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021
@inproceedings{orosa2021codic,title={Codic: A low-cost substrate for enabling custom in-dram functionalities and optimizations},author={Orosa, Lois and Wang, Yaohua and Sadrosadati, Mohammad and Kim, Jeremie S and Patel, Minesh and Puddu, Ivan and Luo, Haocong and Razavi, Kaveh and G{\'o}mez-Luna, Juan and Hassan, Hasan and others},booktitle={2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)},pages={484--497},year={2021},organization={IEEE},}
2020
MICRO
FIGARO: Improving system performance via fine-grained in-DRAM data relocation and caching
Yaohua Wang, Lois Orosa, Xiangjun Peng, Yang Guo, Saugata Ghose, Minesh Patel, Jeremie S Kim, Juan Gómez Luna, Mohammad Sadrosadati, Nika Mansouri Ghiasi, and others
In 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2020
@inproceedings{wang2020figaro,title={FIGARO: Improving system performance via fine-grained in-DRAM data relocation and caching},author={Wang, Yaohua and Orosa, Lois and Peng, Xiangjun and Guo, Yang and Ghose, Saugata and Patel, Minesh and Kim, Jeremie S and Luna, Juan G{\'o}mez and Sadrosadati, Mohammad and Ghiasi, Nika Mansouri and others},booktitle={2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},pages={313--328},year={2020},organization={IEEE},}
ISCA
Revisiting rowhammer: An experimental analysis of modern dram devices and mitigation techniques
Jeremie S Kim, Minesh Patel, A Giray Yağlıkçı, Hasan Hassan, Roknoddin Azizi, Lois Orosa, and Onur Mutlu
In 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020
@inproceedings{kim2020revisiting,title={Revisiting rowhammer: An experimental analysis of modern dram devices and mitigation techniques},author={Kim, Jeremie S and Patel, Minesh and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Hassan, Hasan and Azizi, Roknoddin and Orosa, Lois and Mutlu, Onur},booktitle={2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)},pages={638--651},year={2020},organization={IEEE},}
MICRO
FlexWatts: A power-and workload-aware hybrid power delivery network for energy-efficient microprocessors
Jawad Haj-Yahya, Mohammed Alser, Jeremie S Kim, Lois Orosa, Efraim Rotem, Avi Mendelson, Anupam Chattopadhyay, and Onur Mutlu
In 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2020
@inproceedings{haj2020flexwatts,title={FlexWatts: A power-and workload-aware hybrid power delivery network for energy-efficient microprocessors},author={Haj-Yahya, Jawad and Alser, Mohammed and Kim, Jeremie S and Orosa, Lois and Rotem, Efraim and Mendelson, Avi and Chattopadhyay, Anupam and Mutlu, Onur},booktitle={2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},pages={1051--1066},year={2020},organization={IEEE},}
ICCD
WoLFRaM: Enhancing wear-leveling and fault tolerance in resistive memories using programmable address decoders
Leonid Yavits, Lois Orosa, Suyash Mahar, João Dinis Ferreira, Mattan Erez, Ran Ginosar, and Onur Mutlu
In 2020 IEEE 38th International Conference on Computer Design (ICCD), 2020
@inproceedings{yavits2020wolfram,title={WoLFRaM: Enhancing wear-leveling and fault tolerance in resistive memories using programmable address decoders},author={Yavits, Leonid and Orosa, Lois and Mahar, Suyash and Ferreira, Jo{\~a}o Dinis and Erez, Mattan and Ginosar, Ran and Mutlu, Onur},booktitle={2020 IEEE 38th International Conference on Computer Design (ICCD)},pages={187--196},year={2020},organization={IEEE},}
ASPLOS
Evanesco: Architectural support for efficient data sanitization in modern flash-based storage systems
Myungsuk Kim, Jisung Park, Genhee Cho, Yoona Kim, Lois Orosa, Onur Mutlu, and Jihong Kim
In Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2020
@inproceedings{kim2020evanesco,title={Evanesco: Architectural support for efficient data sanitization in modern flash-based storage systems},author={Kim, Myungsuk and Park, Jisung and Cho, Genhee and Kim, Yoona and Orosa, Lois and Mutlu, Onur and Kim, Jihong},booktitle={Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)},pages={1311--1326},year={2020},}
IEEE Design & Test
Robust machine learning systems: Challenges, current trends, perspectives, and the road ahead
Muhammad Shafique, Mahum Naseer, Theocharis Theocharides, Christos Kyrkou, Onur Mutlu, Lois Orosa, and Jungwook Choi
@article{shafique2020robust,title={Robust machine learning systems: Challenges, current trends, perspectives, and the road ahead},author={Shafique, Muhammad and Naseer, Mahum and Theocharides, Theocharis and Kyrkou, Christos and Mutlu, Onur and Orosa, Lois and Choi, Jungwook},journal={IEEE Design \& Test},volume={37},number={2},pages={30--57},year={2020},publisher={IEEE},}
ISCA
CLR-DRAM: A low-cost DRAM architecture enabling dynamic capacity-latency trade-off
Haocong Luo, Taha Shahroodi, Hasan Hassan, Minesh Patel, A Giray Yağlıkçı, Lois Orosa, Jisung Park, and Onur Mutlu
In 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020
@inproceedings{luo2020clr,title={CLR-DRAM: A low-cost DRAM architecture enabling dynamic capacity-latency trade-off},author={Luo, Haocong and Shahroodi, Taha and Hassan, Hasan and Patel, Minesh and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Orosa, Lois and Park, Jisung and Mutlu, Onur},booktitle={2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)},pages={666--679},year={2020},organization={IEEE},}
2019
HPCA
D-RaNGe: Using commodity DRAM devices to generate true random numbers with low latency and high throughput
Jeremie S Kim, Minesh Patel, Hasan Hassan, Lois Orosa, and Onur Mutlu
In 2019 IEEE International symposium on high performance computer architecture (HPCA), 2019
@inproceedings{kim2019d,title={D-RaNGe: Using commodity DRAM devices to generate true random numbers with low latency and high throughput},author={Kim, Jeremie S and Patel, Minesh and Hassan, Hasan and Orosa, Lois and Mutlu, Onur},booktitle={2019 IEEE International symposium on high performance computer architecture (HPCA)},pages={582--595},year={2019},organization={IEEE},}
TACO
ITAP: Idle-time-aware power management for GPU execution units
@article{sadrosadati2019itap,title={ITAP: Idle-time-aware power management for GPU execution units},author={Sadrosadati, Mohammad and Ehsani, Seyed Borna and Falahati, Hajar and Ausavarungnirun, Rachata and Tavakkol, Arash and Abaee, Mojtaba and Orosa, Lois and Wang, Yaohua and Sarbazi-Azad, Hamid and Mutlu, Onur},journal={ACM Transactions on Architecture and Code Optimization (TACO)},volume={16},number={1},pages={1--26},year={2019},publisher={ACM New York, NY, USA},}
MICRO
EDEN: Enabling energy-efficient, high-performance deep neural network inference using approximate DRAM
Skanda Koppula, Lois Orosa, A Giray Yağlıkçı, Roknoddin Azizi, Taha Shahroodi, Konstantinos Kanellopoulos, and Onur Mutlu
In Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2019
@inproceedings{koppula2019eden,title={EDEN: Enabling energy-efficient, high-performance deep neural network inference using approximate DRAM},author={Koppula, Skanda and Orosa, Lois and Ya{\u{g}}l{\i}k{\c{c}}{\i}, A Giray and Azizi, Roknoddin and Shahroodi, Taha and Kanellopoulos, Konstantinos and Mutlu, Onur},booktitle={Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},pages={166--181},year={2019},}
2018
MICRO
Reducing DRAM latency via charge-level-aware look-ahead partial restoration
Yaohua Wang, Arash Tavakkol, Lois Orosa, Saugata Ghose, Nika Mansouri Ghiasi, Minesh Patel, Jeremie S Kim, Hasan Hassan, Mohammad Sadrosadati, and Onur Mutlu
In 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2018
@inproceedings{wang2018reducing,title={Reducing DRAM latency via charge-level-aware look-ahead partial restoration},author={Wang, Yaohua and Tavakkol, Arash and Orosa, Lois and Ghose, Saugata and Ghiasi, Nika Mansouri and Patel, Minesh and Kim, Jeremie S and Hassan, Hasan and Sadrosadati, Mohammad and Mutlu, Onur},booktitle={2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)},pages={298--311},year={2018},organization={IEEE},}
TACO
AVPP: Address-first value-next predictor with value prefetching for improving the efficiency of load value prediction
Lois Orosa, Rodolfo Azevedo, and Onur Mutlu
ACM Transactions on Architecture and Code Optimization (TACO), 2018
@article{orosa2018avpp,title={AVPP: Address-first value-next predictor with value prefetching for improving the efficiency of load value prediction},author={Orosa, Lois and Azevedo, Rodolfo and Mutlu, Onur},journal={ACM Transactions on Architecture and Code Optimization (TACO)},volume={15},number={4},pages={1--30},year={2018},publisher={ACM New York, NY, USA},}
ISCA
FLIN: Enabling fairness and enhancing performance in modern NVMe solid state drives
Arash Tavakkol, Mohammad Sadrosadati, Saugata Ghose, Jeremie Kim, Yixin Luo, Yaohua Wang, Nika Mansouri Ghiasi, Lois Orosa, Juan Gómez-Luna, and Onur Mutlu
In 2018 acm/ieee 45th annual international symposium on computer architecture (ISCA), 2018
@inproceedings{tavakkol2018flin,title={FLIN: Enabling fairness and enhancing performance in modern NVMe solid state drives},author={Tavakkol, Arash and Sadrosadati, Mohammad and Ghose, Saugata and Kim, Jeremie and Luo, Yixin and Wang, Yaohua and Ghiasi, Nika Mansouri and Orosa, Lois and G{\'o}mez-Luna, Juan and Mutlu, Onur},booktitle={2018 acm/ieee 45th annual international symposium on computer architecture (ISCA)},pages={397--410},year={2018},organization={IEEE},}
2016
The Computer Journal
Asymmetric Allocation in a Shared Flexible Signature Module for Multicore Processors
Lois Orosa, Javier D Bruguera, and Elisardo Antelo
@article{orosa2016asymmetric,title={Asymmetric Allocation in a Shared Flexible Signature Module for Multicore Processors},author={Orosa, Lois and Bruguera, Javier D and Antelo, Elisardo},journal={The Computer Journal},volume={59},number={10},pages={1453--1469},year={2016},publisher={OUP},}
PDP
A Hardware Approach to Detect, Expose and Tolerate High Level Data Races
Lois Orosa and Joao Lourenco
In 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP), 2016
@inproceedings{orosa2016hardware,title={A Hardware Approach to Detect, Expose and Tolerate High Level Data Races},author={Orosa, Lois and Lourenco, Joao},booktitle={2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)},pages={159--167},year={2016},organization={IEEE},}
ASAP
Temporal frequent value locality
Lois Orosa and Rodolfo Azevedo
In 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2016
@inproceedings{orosa2016temporal,title={Temporal frequent value locality},author={Orosa, Lois and Azevedo, Rodolfo},booktitle={2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP)},pages={147--152},year={2016},organization={IEEE},}
ICECS
Architecting a computer with a full optical RAM
Jorge Gonzalez, Lois Orosa, and Rodolfo Azevedo
In 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2016
@inproceedings{gonzalez2016architecting,title={Architecting a computer with a full optical RAM},author={Gonzalez, Jorge and Orosa, Lois and Azevedo, Rodolfo},booktitle={2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)},pages={716--719},year={2016},organization={IEEE},}
@article{orosa2012flexsig,title={Flexsig: Implementing flexible hardware signatures},author={Orosa, Lois and Antelo, Elisardo and Bruguera, Javier D},journal={ACM Transactions on Architecture and Code Optimization (TACO)},volume={8},number={4},pages={1--20},year={2012},publisher={ACM New York, NY, USA},}
HPCA
Pacman: Tolerating asymmetric data races with unintrusive hardware
Shanxiang Qi, Norimasa Otsuki, Lois Orosa Nogueira, Abdullah Muzahid, and Josep Torrellas
In IEEE International Symposium on High-Performance Comp Architecture (HPCA), 2012
@inproceedings{qi2012pacman,title={Pacman: Tolerating asymmetric data races with unintrusive hardware},author={Qi, Shanxiang and Otsuki, Norimasa and Nogueira, Lois Orosa and Muzahid, Abdullah and Torrellas, Josep},booktitle={IEEE International Symposium on High-Performance Comp Architecture (HPCA)},pages={1--12},year={2012},organization={IEEE},}